New Delhi, 14 September 2013

The Government of India has approved setting up of two Semiconductor Wafer Fabrication (FAB) Manufacturing Facilities in the country. One of the units is proposed to be set up in Gujarat. These FAB facilities are expected to provide big boost to the Electronics System Design and Manufacturing eco-system in the country.

The Government had in 2011 constituted an Empowered Committee to identify technology and investors and to recommend incentives to be provided to set up two FAB facilities in the country. The Empowered Committee had issued a Global Expression of Interest inviting technology providers and investors to set up the FAB facilities. This Committee submitted its recommendations to the Government in March 2013.

The details of the two FAB facilities proposed to be set up are as follows:

(i) M/s Jaiprakash Associates along with M/s IBM (USA) and M/s Tower Jazz (Israel). The outlay of the proposed FAB is about Rs 26,300 crore for establishing the FAB facility of 40,000 wafer starts per month of 300 mm size, using Advanced CMOS technology. Technology nodes proposed are 90, 65 and 45 nm nodes in Phase I, 28 nm node in Phase II with the option of establishing a 22 nm node in Phase III. The proposed location is Greater Noida.

(ii)M/s Hindustan Semiconductor Manufacturing Corporation (HSMC) along with M/s ST Microelectronics (France/Italy) and M/s Silterra (Malaysia). The outlay of the proposed FAB is about Rs 25,250 crore for the fab facility of 40,000 wafer starts per month of 300 mm size, using Advanced CMOS technology. Technology nodes proposed are 90, 65 and 45 nm nodes in Phase I and 45, 28 and 22 nm nodes in Phase II. The proposed location is Prantij, near Gandhinagar, Gujarat.

The Government has also approved the package of incentives for the two consortia. This package includes incentives already available under the Modified Special Incentive Package Scheme (M-SIPS) and deduction available for expenditure on R&D under the Income Tax Act. In addition, FAB facilities will also be eligible for investment linked deduction under Section 35AD of the Income Tax Act. The Government will provide Viability Gap Funding (VGF) in the form of an interest free loan for a period of 10 years.

The Government has also required the technology providers to take equity of at least 10% in the proposed projects. The Government will also get 11% equity in the said projects. The details of the incentives will, however, be worked out based on appraisal of Detailed Project Reports to be submitted by the two consortia within a period of two months.

An Expression of Interest would be published inviting proposals from other leading companies intending to establish FAB in India to be submitted in 4 weeks. Government of India would extend the special package of incentives to the qualified proposals.

According to ministry, this will help set up a critical pillar required to promote Electronics System Design and Manufacturing (ESDM) in the country. The Semiconductor Wafer FABs when set up will stimulate the flow of capital and technology, create employment opportunities, help higher value addition in the electronic products manufactured in the country, reduce dependence on imports and lead to innovation. The proposed FABs will create direct employment of about 22,000 and indirect employment of about one lakh.